Intel Seals Billions in Advanced Packaging Deals, Opens 18A Tech to Rivals

Intel's Foundry division is poised to secure major revenue streams from its advanced packaging technologies, with CFO David Zinsner announcing at the Morgan Stanley Technology conference on March 5 that deals initially valued at hundreds of millions could scale to billions annually. These contracts target high-demand AI and high-performance computing chips, leveraging Intel's EMIB (Embedded Multi-die Interconnect Bridge) and Foveros 2.5D/3D stacking methods. Facilities in New Mexico, Malaysia, and partnerships in South Korea position Intel to challenge TSMC's dominance in packaging, especially as CoWoS capacity bottlenecks plague competitors like Nvidia.

This development is pivotal as packaging has eclipsed traditional node scaling in importance for complex multi-chiplet designs. Intel's approach offers design flexibility and cost efficiency by using targeted silicon bridges rather than full interposers, enabling faster data transfer and power savings critical for AI accelerators. With U.S.-based production reducing supply chain risks amid geopolitical tensions, Intel bolsters domestic semiconductor sovereignty while attracting customers like AWS and Cisco, even those using TSMC wafers.

Adding momentum, CEO Lip-Bu Tan has shifted strategy on the 18A process node, now planning external access after initially reserving it internally. This opens Intel Foundry to broader competition against TSMC's integrated solutions. Looking ahead, Intel targets expanded EMIB capacity supporting larger reticle sizes through 2028, capitalizing on AI growth while TSMC's U.S. packaging lags until at least 2028.